This invention relates to a switching circuit having a shortened response time determined by the charging rate of a capacitor.
A conventional differential switching circuit employed in a muting circuit, a noise eliminating circuit, or the like in a radio receiver is shown in FIG. 1. When a passage control signal is applied over line 2 to a switching circuit 1, an input signal applied to the input terminal IN is passed through to the output terminal OUT. In contrast, when an interruption signal is applied over line 3, a signal applied to terminal IN is interrupted or blocked by the switching circuit 1, and not delivered to terminal OUT.
If the resistances of biasing resistors R.sub.3 and R.sub.4 are selected so that when no voltage is applied to a switching terminal (C) at the base of transistor Q.sub.1, the potential at a point (B) is higher by at least 4 KT/q (where K is the Boltzman constant, T is the absolute temperature, and q is the electron charge) than the potential at point (A), then transistor Q.sub.2 is rendered conductive while transistor Q.sub.3 is rendered non-conductive. Accordingly, only the passage control signal on line 2 is provided, and a signal applied to the input terminal IN is passed through to the output terminal OUT. When a voltage V.sub.1 is applied to the switching terminal (C), point (B) has a potential (V.sub.1 +V.sub.BE1) where V.sub.BE1 is the base-emitter voltage of transistor Q.sub.1. If the value of V.sub.1 is set so that the potential Va at point (A) is higher by at least 4 KT/q than the potential at point (B), then transistor Q.sub.3 is rendered conductive, while transistor Q.sub.2 is cut off. Accordingly, an interruption control signal is provided on line 3, and the input signal is blocked in the switching circuit 1.
When the application of voltage V.sub.1 to the switching terminal (C) is suspended, the potential at point (B) builds up to the supply voltage +Vcc after a time period determined by the values of resistor R.sub.1 and capacitor C.sub.1, as shown by curve (a) in FIG. 6. If the time interval during which the potential at point (B) changes from (V.sub.1 +V.sub.BE1) to (Va-4 KT/q) is represented by t.sub.0, then transistors Q.sub.3 and Q.sub.2 are maintained conductive and non-conductive, respectively, during the time t.sub.0, and accordingly the interruption control signal remains on line 3 during such time. If the time interval during which the potential at point (B) changes from (Va-4 KT/q) to (Va+4 KT/q) is referred to as the differential switching period and is represented by t.sub.1, then collector currents I.sub.C1 and I.sub.C2 simultaneously flow in the transistors Q.sub.2 and Q.sub.3, respectively, during such time because it falls in a linear region as shown in FIGS. 2 and 6. After time t.sub.1 transistor Q.sub.2 is rendered conductive while transistor Q.sub.3 is cut off, whereby only the passage control signal appears on line 2.
As is apparent from the above description, a problem exists during the differential switching period t.sub.1 because during such time both the passage control and interruption control signals are generated, which leads to the erroneous operation of the switching circuit 1.
An ordinary transistor switching circuit employing a conventional capacitor charging circuit is shown in FIG. 3. The breakdown voltage of the Zener diode D.sub.Z1 is represented by V.sub.DZ1, and the base-emitter voltage of transistor Q.sub.5 is represented by V.sub.BE5. Upon the closure of switch SW.sub.1, the potential at point (B) is increased to (V.sub.DZ1 +V.sub.BE5) over a time period determined by the values of resistor R.sub.1 and capacitor C.sub.1, as shown by curve (a) in FIG. 7. When the potential at point (B) exceeds V.sub.DZ1, current begins to flow in transistor Q.sub.5 and the potential at terminal (D) begins to drop. When the potential at point (B) reaches (V.sub.DZ1 +V.sub.BE5) transistor Q.sub.5 is rendered fully conductive, whereby the voltage at terminal (D) is substantially equal to the breakdown voltage V.sub.DZ1 of the Zener diode D.sub.Z1. The output voltage at terminal (D) does not have a steep drop, however, as shown by curve (b) in FIG. 7, because of the relatively slow build up characteristic of the potential at point (B), which leads to a reduction of the switching speed.